In a semiconductor memory device, a diffusion layer and a gate electrode of a transistor, and an upper layer wiring, are electrically connected to each other by a contact plug. This contact plug is configured with a metal layer and a barrier metal layer, and provided on a silicide layer formed on silicon. In a structure in which the barrier metal layer of the contact plug is in contact with the silicide layer, there may be a concern that a resistance increases between the contact plug and the silicide layer.